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sst-6809:memory_latch_select_256b [2025/05/23 19:35] – [ASSIST09] robertsst-6809:memory_latch_select_256b [2025/05/23 19:55] (current) – [RAM Mapping Note] robert
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 ====== Memory Latch Select 256b ====== ====== Memory Latch Select 256b ======
  
-The paging latch.+^ Address Range  ^ Usage  ^ 
 +| 0000-7FFF  | Lower 32K RAM  | 
 +| 8000-DFFF  | Upper 32K RAM (24K directly usable) 
 +| E000-EFFF  | I/O Address Range  | 
 +| F000-FFEF  | EEPROM 
 +| FFF0-FFFF  | MPU Vectors 
 + 
 +===== The Paging Latch =====
  
 ^ ^ ^^^ ^^^^ ^ ^ ^^^ ^^^^
 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
 | Status LED| EEPROM 4K Page ||| RAM 64K Map |||| | Status LED| EEPROM 4K Page ||| RAM 64K Map ||||
-| 1 = on, 0 = off | 0-7 ||| 0-15  ||||+| 1 = off, 0 = on | 0-7 ||| 0-15  ||||
  
 ===== Status LED ===== ===== Status LED =====
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 E.g. if you write a 1 to EF00 it will duplicate the upper bank in the lower bank. E.g. if you write a 1 to EF00 it will duplicate the upper bank in the lower bank.
  
 +==== RAM Mapping Note ====
 +
 +:!: 
 +
 +Be sure you have RAM switching code in ROM before switching to RAM pages 2 or higher.
 +
 +ROM code should include functions to:
 +  * Register-only Block Copy from RAM pages 0 and 1 into pages 2 and higher
 +    * The block copy must be split in two halves:
 +    * The first half gets the source byte into a register (only)
 +    * Switch the RAM page page but let the Program Counter fall through into the next ROM instruction which is the start of the second half of the copy 
 +    * The second half takes the register and posts it into a destination address of the destination RAM page
 +    * Then switch BACK to the source RAM page and fall through into the next ROM address which continue copying from source RAM page 
 +  * Transfer the Program Counter into the destination address of the destination RAM page to start running code from
 ===== Upper 32K ===== ===== Upper 32K =====