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sst-6809:memory_map [2025/03/16 20:49] – split main bus select 1 1k to its own page robertsst-6809:memory_map [2025/04/12 11:34] (current) robert
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 | ::: |  E400 - E7FF  | [[Main Bus Select 1 1K]] | | ::: |  E400 - E7FF  | [[Main Bus Select 1 1K]] |
 | ::: |  E800 - EAFF  | unassigned | | ::: |  E800 - EAFF  | unassigned |
-| ::: |  EB00 - EBFF  | [[#ACIA Select 256b]] |+| ::: |  EB00 - EBFF  | [[ACIA Select 256b]] |
 | ::: |  EC00 - EEFF  | unassigned | | ::: |  EC00 - EEFF  | unassigned |
-| ::: |  EF00 - EFFF  | [[#Memory Latch Select 256b]] | +| ::: |  EF00 - EFFF  | [[Memory Latch Select 256b]] | 
-| ROM |  F000 - FFFF  | [[#EEPROM 4K]] |+| ROM |  F000 - FFFF  | [[EEPROM 4K]] |
 | ::: |  F000 - F3FF  | [[ASSIST09]] Expansion ROM area (unused) | | ::: |  F000 - F3FF  | [[ASSIST09]] Expansion ROM area (unused) |
 | ::: |  F800 - FFFF  | [[ASSIST09]] | | ::: |  F800 - FFFF  | [[ASSIST09]] |
-| MPU |  FFF0 - FFF1  | HD6390 Illegal Opcode/Divide By Zero Trap vector (FFD4) |+| MPU |  FFF0 - FFF1  | HD6309 Illegal Opcode/Divide By Zero Trap vector (FFD4) |
 | ::: |  FFF2 - FFF3  | SWI3 vector (FFD8) | | ::: |  FFF2 - FFF3  | SWI3 vector (FFD8) |
 | ::: |  FFF4 - FFF5  | SWI2 vector (FFDC)| | ::: |  FFF4 - FFF5  | SWI2 vector (FFDC)|
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 These use J3 select jumper for 8xxx - Exxx address select range These use J3 select jumper for 8xxx - Exxx address select range
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-===== ACIA Select 256b ===== 
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-The Status, Control, TX, and RX registers of a Motorola MC6850 or Hitachi HD6350 Asynchronous Communication Interface Adapter (ACIA) are mapped into this 256 byte page. 
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-The ACIA has 4 registers accessible through 2 memory mapped input/output (MMIO) addresses. 
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-A read from $EB00 will return the content of the ACIA Status register. 
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-A write to $EB00 will update the ACIA Control register with new configuration. 
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-A read from $EB01 will return received byte from the ACIA RX Data register. 
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-A write to $EB01 will update the ACIA TX Data register with a new byte to transmit. 
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-===== Memory Latch Select 256b ===== 
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-The paging latch. 
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-Writing to it selects different blocks from the 512k to appear in the main map. 
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-E.g. if you write a 1 to EF00 it will duplicate the upper bank in the lower bank. 
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-The memory decode maps any 32k page of the 512k into $0000-$7FFF. 
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-The region from $8000-$DFFF is not affected by the paging register contents. 
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-So you can run paging code resident there. 
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-For that reason, it's also recommended to put any ISR's there. 
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-The lowest 4 paging bits control RAM, bits 4-6 select one of 8 EEPROM pages of 4k each. 
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-Bit 7 controls the "stat" LED 
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-The M command is RMW and the latch is not qualified with R/W. 
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-The CPU can write it but if you try doing it manually with the monitor, it will write garbage into the latch. 
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-If you store in a $80 it should change the status LED 
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-To be more specific, $80 turns the LED off and $00 turns it on as it is a pulldown and should be on at reset. 
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-The logic fixes ROM and I/O in place. 
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-When you map page 1 to page 0, only the RAM is relocated. 
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-So, the RAM that is hidden "under" ROM and I/O becomes visible that way. 
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-===== EEPROM 4K ===== 
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-The SST-6809 contains a 32KB EEPROM. 
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-The Memory Latch Select allows mapping one of eight 4KB sections of the EEPROM into the memory range $F000-$FFFF which includes the MPU interrupt vectors. 
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-Make use of the boot ROM select jumper(s). 
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-The 2.0 can boot from 4 different segments, the 2.1 only 2. 
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-But the current EEPROM only has ASSIST09 burned into it. 
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-The "external ROM" is just the unused space in the other half of the 4k boot ROM. 
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-Ken just never put anything there. 
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-At some point Ken could burn another boot into an EEPROM. 
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-The PTM on the Mezz board can support tracing with ASSIST09, but it needs a jumper to put its interrupt on NMI. 
  
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