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sst-6809:top [2024/10/24 20:00] – [Getting Started] robert | sst-6809:top [2025/02/01 07:26] (current) – [M8 Motorino and VDP09] robert | ||
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====== SST-6809 Single Board Computer ====== | ====== SST-6809 Single Board Computer ====== | ||
- | {{sst-6809-2.0.png? | + | ^ SST-6809 SBC V2.0 ^ SST-6809 SBC V2.1 ^ |
+ | | | ||
[[https:// | [[https:// | ||
- | ^ Part ^ Integrated Circuit ^ | + | ^ |
- | | U1 | Motorola MC68B09 or Hitachi HD63C09 MPU | | + | | U1 | Motorola MC68B09 or Hitachi HD63C09 MPU | |
- | | U2 | Texas Instruments SN74HCT273N Octal Flip-Flop with Reset | | + | | U2 | Texas Instruments SN74HCT273N Octal Flip-Flop with Reset | |
- | | U3 | Alliance AS6C4008-55PCN 4Mbit / 512KB SRAM | | + | | U3 | Alliance AS6C4008-55PCN 4Mbit / 512KB SRAM | |
- | | U4 | Motorola MC68B50 or Hitachi HD63B50 ACIA | | + | | U4 | Motorola MC68B50 or Hitachi HD63B50 ACIA | |
- | | U5 | Dallas Semiconductor DS1813 EconoReset | | + | | U5 | Dallas Semiconductor DS1813 EconoReset |
- | | U6 | Phillips 74HCT02N Quad 2-Input NOR | | + | | U6 | Phillips 74HCT02N Quad 2-Input NOR | |
- | | U7 | Dallas Semiconductor DS1210 Nonvolatile Controller | | + | | U7 | Dallas Semiconductor DS1210 Nonvolatile Controller |
- | | U8 | Shenzhen Honglifa HLF SN74HCT139N Dual 2-to-4 Line Decoder / Demultiplexer | | + | | U8 | Shenzhen Honglifa HLF SN74HCT139N Dual 2-to-4 Line Decoder / Demultiplexer |
- | | U9 | Atmel At28C256 256Kbit / 32KB Parallel EEPROM | | + | | U9 | Atmel At28C256 256Kbit / 32KB Parallel EEPROM |
- | | U10 | Motorola MC74HCT138AN 3-to-8 Line Decoder / Demultiplexer | | + | | U10 | Motorola MC74HCT138AN 3-to-8 Line Decoder / Demultiplexer |
- | | U11 | Dallas Semiconductor DS1233 EconoReset | | + | | U11 | Dallas Semiconductor DS1233 EconoReset |
- | | U12 | :!: | | + | | U12 | - not present - |
- | | U13 | Phillips 74HCT20N Dual 4-input NAND | | + | | U13 | Phillips 74HCT20N Dual 4-input NAND | |
The [[Memory Map]] and Bank Switching. | The [[Memory Map]] and Bank Switching. | ||
+ | |||
+ | ===== Jumpers ===== | ||
+ | |||
+ | ==== JP2 ==== | ||
+ | |||
+ | JP2 connects to on-board 3.0V coin cell to the backup circuit. | ||
+ | |||
+ | The purpose is to provide an easy way to clear the NVRAM contents on the V2.1 SBC. | ||
+ | |||
+ | ==== JP3 ==== | ||
+ | |||
+ | ^ JP3 ^ Selects | ||
+ | | 1-2 | External 5V from screw terminals | ||
+ | | 2-3 | 5V Comes from USB serial adapter | ||
+ | |||
+ | Some boards like the [[#M8 Game Board]] use too much power for the USB port to supply. | ||
+ | |||
+ | In that case, external regulated 5V should be connect to the screw terminals, and the jumper on JP3 should be moved to pins 1-2. | ||
+ | |||
+ | Otherwise, it should join pins 2-3 for USB power. | ||
+ | |||
+ | This is done to prevent 5V board power from backfeeding into the USB port. | ||
+ | |||
+ | ==== JP5 ==== | ||
+ | |||
+ | ^ JP5 ^ SBC V2.1 Boot ROM Select ((SBC V2.0 has two jumpers for ROM select.)) | ||
+ | | 1-2 | normal | ||
+ | | 2-3 | ROM A14 inverted | ||
+ | |||
+ | In the normal position, the system boots from the top of the 32K EEPROM | ||
+ | |||
+ | In the inverted position, it boots from code at the top of the lower 16K of the same EEPROM. | ||
+ | |||
+ | This control bit originates from the latch, so it can be changed by writing the latch, regardless of position. | ||
+ | |||
+ | ==== J4 ==== | ||
+ | |||
+ | ^ J4 ^ Main Serial Connector | ||
+ | | 1 | Ground | ||
+ | | 2 | VCC (5V) | | ||
+ | | 3 | Transmit Data (TXD) | | ||
+ | | 4 | Receive Data (RXD) | | ||
+ | | 5 | Data Terminal Ready (DTR) - Not Connected | ||
+ | | 6 | 3V3 - Not Connected | ||
+ | |||
+ | ==== J5 ==== | ||
+ | |||
+ | J5 exposes some 6x09 signals that do not appear on [[#The M8 Bus]] | ||
+ | |||
+ | ^ J5 Pin ^ Signal | ||
+ | | 1 | 6x09 Bus Status (BS) | | ||
+ | | 2 | NVBAT | | ||
+ | | 3 | 6x09 /FIRQ " | ||
+ | | 4 | 6x09 /RESET Reset Interrupt Request | ||
+ | | 5 | M8 Bus Select 1 (BSEL1) | ||
+ | | 6 | Ground | ||
+ | |||
+ | The NVBAT pin on J5 has two possible uses. | ||
+ | |||
+ | It is connected directly to the on board battery. | ||
+ | |||
+ | So it can either be used to replace the on board with an external battery, or can convey backup power to additional circuits such as, for example, an RTC. | ||
+ | |||
+ | ==== J6 ==== | ||
+ | |||
+ | J6 Access to the secondary battery connection and additional serial signals. | ||
+ | |||
+ | The DS1210 NVRAM controller supports two backup batteries. | ||
+ | |||
+ | J6 provides access to the secondary battery. | ||
+ | |||
+ | This should have a jumper between pin 1 and 2 to ground BAT2 if it's not in use. | ||
+ | |||
+ | It makes it possible to use an external battery. | ||
+ | |||
+ | One important purpose of the BAT2 connection, is that the on board battery may be removed for replacement without incurring memory loss, provided that a second battery is temporarily connected to GND and BAT2 on J6. | ||
+ | |||
+ | ^ J6 Pin ^ Purpose | ||
+ | | 1 | Ground | ||
+ | | 2 | Battery 2 | | ||
+ | | 3 | Serial Ready To Send (RTS) | | ||
+ | | 4 | Serial Data Terminal Ready (DTR) | | ||
+ | |||
+ | ===== SBC Reset Circuit ===== | ||
+ | |||
+ | There are three footprints for a reset circuit on the board. | ||
+ | |||
+ | Only one should be populated for use. | ||
+ | |||
+ | The basic RC does work but some future devices may not tolerate the slow rise time. | ||
+ | |||
+ | There is a footprint for a DS1813 or for a DS1233 - these are obsolete parts but better than the RC reset solution if they are available. | ||
+ | |||
+ | ===== The M8 Bus ===== | ||
The M8 bus design allows using the most advanced ICs that were available at the time, without regard to brand and fully supports DMA with the 6809 as well. | The M8 bus design allows using the most advanced ICs that were available at the time, without regard to brand and fully supports DMA with the 6809 as well. | ||
+ | |||
+ | Note: The board decodes two bus select signals BSEL0 and BSEL1, only BSEL0 is routed to the M8 bus. | ||
+ | |||
+ | The additional decode could be routed to circuits on peripheral cards, using fly wire jumpers, for development purposes. | ||
===== M8 Game Board ===== | ===== M8 Game Board ===== | ||
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[[https:// | [[https:// | ||
+ | |||
+ | ===== M8 Blinkenlights ===== | ||
+ | |||
+ | :!: Coming soon | ||
===== Software ===== | ===== Software ===== | ||
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===== TinyBASIC ===== | ===== TinyBASIC ===== | ||
- | TinyBASIC [[https:// | + | TinyBASIC |
Then, start TinyBASIC with: | Then, start TinyBASIC with: | ||
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>G 1000 | >G 1000 | ||
! | ! | ||
- | |||
- | The [[http:// | ||
===== Additional Software ===== | ===== Additional Software ===== | ||
- | | + | The [[http:// |
+ | |||
+ | With it, I have also adapted the following to execute: | ||
+ | | ||
* [[BUGGY]] 1.01 by Lennart Benschop | * [[BUGGY]] 1.01 by Lennart Benschop | ||
+ | ===== M8 Motorino and VDP09 ===== | ||
+ | |||
+ | The M8 family grew with the addition of the M8 Game Board (code name Motorino): | ||
+ | |||
+ | {{: | ||
+ | |||
+ | The SST-6809 V2.1 board is on the left and the M8 Game Board is on the right. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | The M8 Game Board brings a TI TMS9918A Video Display Processor (think ColecoVision graphics), a Phillips SAA1099P six-channel stereo sound generator, 2 digital joystick ports, and a Motorola 6850 or Hitachi 6350 serial ACIA port. | ||
+ | |||
+ | Here, the M8 Game Board runs a VDP09 demo with a bouncing sprite over a changing Graphics II mode background. | ||
===== Future ... ===== | ===== Future ... ===== | ||
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===== Additional Resources ===== | ===== Additional Resources ===== | ||
+ | * [[https:// | ||
+ | * [[https:// | ||
* [[http:// | * [[http:// | ||
* [[http:// | * [[http:// |