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sst-6809:top [2024/10/25 19:34] – robert | sst-6809:top [2025/02/01 07:26] (current) – [M8 Motorino and VDP09] robert | ||
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====== SST-6809 Single Board Computer ====== | ====== SST-6809 Single Board Computer ====== | ||
- | {{sst-6809-2.0.png? | + | ^ SST-6809 SBC V2.0 ^ SST-6809 SBC V2.1 ^ |
- | + | | | |
- | {{sst-6809-2.1.png? | + | |
[[https:// | [[https:// | ||
- | ^ V2.0 Part ^ Integrated Circuit ^ | + | ^ V2.0 Part ^ Integrated Circuit |
- | | U1 | Motorola MC68B09 or Hitachi HD63C09 MPU | | + | | U1 | Motorola MC68B09 or Hitachi HD63C09 MPU | |
- | | U2 | Texas Instruments SN74HCT273N Octal Flip-Flop with Reset | | + | | U2 | Texas Instruments SN74HCT273N Octal Flip-Flop with Reset | |
- | | U3 | Alliance AS6C4008-55PCN 4Mbit / 512KB SRAM | | + | | U3 | Alliance AS6C4008-55PCN 4Mbit / 512KB SRAM | |
- | | U4 | Motorola MC68B50 or Hitachi HD63B50 ACIA | | + | | U4 | Motorola MC68B50 or Hitachi HD63B50 ACIA | |
- | | U5 | Dallas Semiconductor DS1813 EconoReset | | + | | U5 | Dallas Semiconductor DS1813 EconoReset |
- | | U6 | Phillips 74HCT02N Quad 2-Input NOR | | + | | U6 | Phillips 74HCT02N Quad 2-Input NOR | |
- | | U7 | Dallas Semiconductor DS1210 Nonvolatile Controller | | + | | U7 | Dallas Semiconductor DS1210 Nonvolatile Controller |
- | | U8 | Shenzhen Honglifa HLF SN74HCT139N Dual 2-to-4 Line Decoder / Demultiplexer | | + | | U8 | Shenzhen Honglifa HLF SN74HCT139N Dual 2-to-4 Line Decoder / Demultiplexer |
- | | U9 | Atmel At28C256 256Kbit / 32KB Parallel EEPROM | | + | | U9 | Atmel At28C256 256Kbit / 32KB Parallel EEPROM |
- | | U10 | Motorola MC74HCT138AN 3-to-8 Line Decoder / Demultiplexer | | + | | U10 | Motorola MC74HCT138AN 3-to-8 Line Decoder / Demultiplexer |
- | | U11 | Dallas Semiconductor DS1233 EconoReset | | + | | U11 | Dallas Semiconductor DS1233 EconoReset |
- | | U12 | - not present - | | + | | U12 | - not present - | |
- | | U13 | Phillips 74HCT20N Dual 4-input NAND | | + | | U13 | Phillips 74HCT20N Dual 4-input NAND | |
The [[Memory Map]] and Bank Switching. | The [[Memory Map]] and Bank Switching. | ||
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==== JP3 ==== | ==== JP3 ==== | ||
- | ^ JP3 ^ Selects ^ | + | ^ JP3 ^ Selects |
- | | 1-2 | External 5V from screw terminals | | + | | 1-2 | External 5V from screw terminals |
- | | 2-3 | 5V Comes from USB serial adapter | | + | | 2-3 | 5V Comes from USB serial adapter |
Some boards like the [[#M8 Game Board]] use too much power for the USB port to supply. | Some boards like the [[#M8 Game Board]] use too much power for the USB port to supply. | ||
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==== JP5 ==== | ==== JP5 ==== | ||
- | ^ JP5 ^ SBC V2.1 Boot ROM Select ((SBC V2.0 has two jumpers for ROM select.)) ^ | + | ^ JP5 ^ SBC V2.1 Boot ROM Select ((SBC V2.0 has two jumpers for ROM select.)) |
- | | 1-2 | normal | | + | | 1-2 | normal |
- | | 2-3 | ROM A14 inverted | | + | | 2-3 | ROM A14 inverted |
In the normal position, the system boots from the top of the 32K EEPROM | In the normal position, the system boots from the top of the 32K EEPROM | ||
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==== J4 ==== | ==== J4 ==== | ||
- | ^ J4 ^ Main Serial Connector ^ | + | ^ J4 ^ Main Serial Connector |
- | | 1 | Ground | | + | | 1 | Ground |
- | | 2 | VCC (5V) | | + | | 2 | VCC (5V) | |
- | | 3 | Transmit Data (TXD) | | + | | 3 | Transmit Data (TXD) | |
- | | 4 | Receive Data (RXD) | | + | | 4 | Receive Data (RXD) | |
- | | 5 | Data Terminal Ready (DTR) - Not Connected | | + | | 5 | Data Terminal Ready (DTR) - Not Connected |
- | | 6 | 3V3 - Not Connected | | + | | 6 | 3V3 - Not Connected |
==== J5 ==== | ==== J5 ==== | ||
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J5 exposes some 6x09 signals that do not appear on [[#The M8 Bus]] | J5 exposes some 6x09 signals that do not appear on [[#The M8 Bus]] | ||
- | ^ Pin ^ Signal ^ | + | ^ |
- | | 1 | BS :!: | | + | | 1 | 6x09 Bus Status (BS) |
- | | 2 | NVBAT | | + | | 2 | NVBAT | |
- | | 3 | /FIRQ " | + | | 3 | |
- | | 4 | /RESET Reset Interrupt Request | | + | | 4 | |
- | | 5 | BSEL1 M8 Bus Select 1 | | + | | 5 | M8 Bus Select 1 (BSEL1) |
- | | 6 | Ground | | + | | 6 | Ground |
The NVBAT pin on J5 has two possible uses. | The NVBAT pin on J5 has two possible uses. | ||
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One important purpose of the BAT2 connection, is that the on board battery may be removed for replacement without incurring memory loss, provided that a second battery is temporarily connected to GND and BAT2 on J6. | One important purpose of the BAT2 connection, is that the on board battery may be removed for replacement without incurring memory loss, provided that a second battery is temporarily connected to GND and BAT2 on J6. | ||
- | ^ Pin ^ Purpose ^ | + | ^ |
- | | 1 | Ground | | + | | 1 | Ground |
- | | 2 | Battery 2 | | + | | 2 | Battery 2 | |
- | | 3 | Serial Ready To Send (RTS) | | + | | 3 | Serial Ready To Send (RTS) | |
- | | 4 | Serial Data Terminal Ready (DTR) | | + | | 4 | Serial Data Terminal Ready (DTR) | |
===== SBC Reset Circuit ===== | ===== SBC Reset Circuit ===== | ||
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[[https:// | [[https:// | ||
+ | |||
+ | ===== M8 Blinkenlights ===== | ||
+ | |||
+ | :!: Coming soon | ||
===== Software ===== | ===== Software ===== | ||
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* [[BUGGY]] 1.01 by Lennart Benschop | * [[BUGGY]] 1.01 by Lennart Benschop | ||
+ | ===== M8 Motorino and VDP09 ===== | ||
+ | |||
+ | The M8 family grew with the addition of the M8 Game Board (code name Motorino): | ||
+ | |||
+ | {{: | ||
+ | |||
+ | The SST-6809 V2.1 board is on the left and the M8 Game Board is on the right. | ||
+ | |||
+ | {{: | ||
+ | |||
+ | The M8 Game Board brings a TI TMS9918A Video Display Processor (think ColecoVision graphics), a Phillips SAA1099P six-channel stereo sound generator, 2 digital joystick ports, and a Motorola 6850 or Hitachi 6350 serial ACIA port. | ||
+ | |||
+ | Here, the M8 Game Board runs a VDP09 demo with a bouncing sprite over a changing Graphics II mode background. | ||
===== Future ... ===== | ===== Future ... ===== | ||